Litton Guidance and Control--Woodland Hills
--5500 Canoga Avenue
--Woodland Hills, CA 91367-6698
September 1997 to February 1998
LC4516E (P3) Central Processor Unit Redesign and
- Convert existing CPU plus I/O design (LC4516E processor set - 6
circuit boards, SSI, MSI TTL) plus added design features and
upgrades into a single large scale ACTEL FPGA (A32200DX).
- Processor redesign, Technology conversion, design capture, Test
bench generation, Simulation, Part Integration, Test in
July 1997 to December 1997
Light Weight Planar Array (LWPA): Laser Based, High
Accuracy (Range and Heading), Sonar Array
- Specify, Architect, Design, Test and Document a single board,
multi-channel, high speed, signal processing interface for the
- Incorporates: High Speed data path signal processing mechanized
as pipelines in multiple XILINX FPGAs. Moderate speed, post
processing of instantaneous angle information supplemented by four
(4) "on board" programmable signal processors (AD2183 type).
- Low speed data and interface set-up and control via VME
standard bus interface.
- High-speed data delivery via Data "RaceWay".