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Resume for Andy Kisylia
Andrew P. Kisylia
President and Owner
A.P.K. Engineering, Inc.
31332 Via Colinas Suite 102
Westlake Village, CA 91362
Phone: (818) 645-1024: Fax (818) 706-2435
e-mail: apkisylia@apk.com
SUMMARY OF MY TECHNICAL MANAGEMENT AND ENGINEERING
EXPERIENCE:
I have been a practicing electronics engineer for approximately
31 years (since October of 1968). I have been a major participant
in numerous "state of the art" engineering projects. My
experience covers both the military and commercial environments. I
have been a consulting engineer since 1974 and a full time
consultant since July of 1979. My primary area of expertise is in
the architecture definition and design (both hardware and software)
of large complex digital systems, specifically in the areas of
computer system architecture, communications and digital video.
However, my depth of experience is certainly not limited to these
areas. I have also been actively involved in the management,
specification and design of a number of custom analog integrated
circuits. My continuing success as a consulting engineer is based
on my ability to understand complex problems and quickly provide
cost effective solutions utilizing the most appropriate technology
for my customers. In order to amplify my effectiveness, I have
found it appropriate and necessary to rely on both well-trained
employees and the available expertise provided by a network of
associates with whom I deal with on an "as needed" contractual
basis. This is a group of professional individuals with whom I have
worked and calibrated during my career.
TECHNICAL MANAGEMENT:
For the past 20 years I have been the president and sole owner
of APK Engineering, Inc. APK is a design consultation
business providing contract electronic design services in both
hardware (digital & analog) and software/firmware.
As the president/owner of a small business, I must wear many hats.
Besides being the primary design engineer, my other roles
include:
- Job Quotations, Specification Writer, Design Team Manager,
Program Engineer, Project Engineer and Chief Financial Officer and
General Company Management.
SYSTEMS DESIGN EXPERTISE
- System Architectural Design: System Structure
Definition, requirements Analysis, Throughput and Timing Analysis,
System Partition, Algorithm Design, Hardware/Software
Specification
HARDWARE DESIGN AND DEVELOPMENT EXPERTISE
- Digital ASIC/FPGA Design: Specification &
Architecture, Technology Selection, Testability Considerations,
Design, Schematic Capture or HDL (VHDL/VeriLog), Simulation (Pre
& Post Design & Layout), Timing Analysis, Verification
& Test.
- ASIC Families Used: 1.0 micron NCR, 0.75micron SMOS, 0.5
& 0.35 IBM
- FPGA Families Used: Xilinx (Spartan, Vertex), Altera,
Actel, Latice, Quicklogic, Atmel, etc.
- Board Level Embedded Processor Designs: 8/16/32/64 Bit
Microprocessor Designs; Intel (8051,80C196, I960,
8088/86/186/286/386/486), Dallas/Phillips (80C320, 8051 series)
Motorola (68HC11/16, 68000/20/30/40, Power PC 603e), MIL- Standard
1750A/B Processor, SHARP embedded ARM & THUMB processors.
- Board Level Embedded Processor Designs: 8/16/32 Bit
Digital Signal Processor Designs; Analog Devices
ADSP-2111/72/82, Texas Instruments TMS320C17/25/30/31
- Analog circuit Design: Power Supplies, Analog &
Mixed Mode Integrated Circuits, High Voltage Half-Bridge Driver
Pairs, Pulse Width Modulation Controllers, etc.
- Printed Circuit Board Level Design: Design Capture, Net
List generation, Layout & Partitioning, Signal Routing,
etc.
SYSTEM BUS CONFIGURATIONS AND COMUNICATION INTERFACE
EXPERTISE
- PC/AT/ISA/PCI, RS-232C/422/485, SCSI, VME, X.25, Fire-Wire
(Copper & Fiber-Optic), 100/10 Base T Ethernet, Sonnet, LVDS,
USB, IRIG, ARINC
SOFTWARE, FIRMWARE AND REAL-TIME EMBEDDED DESIGN AND
DEVELOPMENT
- C, C++, Basic, Most Microprocessor, DSP and Micro-controller
Assembly Languages.
- Applications, Diagnostics, Test and Real-Time Embedded
Firmware/Software Design, Development, Test and Modifications
- Control and Device Driver Design, Development &
Modifications
- Chip (ASIC), Board, Module and System Power-On-Self-Test
(POST), Diagnostics Development
COMPUTERS, OPERATING SYSTEMS AND DESIGN TOOLS
- SUN (SPARK) series, PC/AT series
- UNIX, SUN OS (Solaris), MS DOS, Microsoft Windows
3.XX/95/98/NT, Windows CE
- Design Capture: ORCAD, ViewLogic, Cadence, VHDL,
VeriLog; Synthesis: Xilinx Foundation, Synopsis;
Simulation: Model Technology, Inc., ViewSim; PCB
Design: ORCAD, PADS, Allegro
- In-Circuit-Emulators (ICE), Logic Analyzers, Oscilloscopes,
DMM's and most Lab Equipment.
TEST AND INTEGRATION
- Device, Board, Module and System Test and Integration.
- Built-In-test (BIT) Specification, Design, Test and
Documentation.
- Data Acquisition Systems (Hardware & Software), Production
Test Automation, Automatic Test Equipment (ATE) Design and
Development.
- Test Fixtures and Interfacing (Test, Power, Special), Wire list
and Cable list Design.
TECHNICAL WRITING AND DOCUMENTATION
- Test Plans, Test Cases, Test Procedures, Operation & User
Manuals, Acceptance Test Procedures (ATP).
- Hardware/Software Requirements Specifications (HRD/SRS),
Hardware/Software Design Documents (HDD/SDD), Test Requirements
Documents (TRD).
- Software (source code) Documentation.
EDUCATION/TRAINING
- Bachelor of Science in Electrical Engineering (BSEE) from The
University of Notre Dame, Notre Dame, Indiana.
- Masters of Science in Electronics Engineering (MSEE) from The
University of Illinois, Champagne/Urbana, Illinois.
- Post Masters Studies Toward a PhD in Computer Science at The
University of California, Los Angeles, California.
- Esperan Masterclass VHDL Tutorial.
PROFESSIONAL SOCIETIES, PATENTS & PUBLICATIONS
- ETA KAPA NU
- TAU BETA PI
- I.E.E.E.
- Patent No. US05778074, 7 July 1998, Methods for
generating variable S-boxes from arbitrary keys of arbitrary length
including methods which allow rapid key changes.
- Patent No. US05583398, 10 December 1996, Powerfactor
correcting flyback arrangement having a resonant capacitor element
connected across the switching element.
- Patent No. US03988717, 26 October 1976, General purpose
computer or logic chip and system.
- Masters Thesis: "An Association Processor for Information
Retrieval", Coordinated Science Laboratory, University of Illinois,
Urbana, Illinois.
JOB HISTORY
My employment history is directly related to the service history of
APK Engineering, Inc. A detailed list of APK Engineering's clients
and the related engineering services rendered for the last 10 years
is described on the clients and projects
page of this web site.
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